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TCAD Solutions

Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor process technologies and devices. Synopsys TCAD offers a comprehensive suite of products that includes industry-leading process and device simulation tools, as well as a powerful graphical user interface (GUI) driven simulation environment for managing simulation tasks and analyzing simulation results. In addition, Synopsys TCAD provides tools for interconnect modeling and extraction, providing critical parasitic information for optimizing chip performance.
• Synopsys TCAD is the industry leader in 3D technology modeling
• Provides integrated simulation environment for Design Technology Co-Optimization
• Delivers production-proven modeling solutions for Logic, Memory, Power, and CIS applications
• Offers smart technology modeling enables cost and time savings in pathfinding, development, and production ramping of semiconductor technologies
Sentaurus Calibration Workbench
Sentaurus™ Calibration Workbench is built for automated workflow-oriented calibration of TCAD models, based on innovative machine learning (ML) capabilities. It is designed to leverage TCAD technology to the next level by enabling users to calibrate process and device simulation models rapidly and systematically for maximum accuracy and predictivity, and thus, reduce the need for expensive experimental wafers in the technology/device development and optimization phases.
Atomic-Scale Modeling
QuantumATK simulates the properties and transport mechanisms of novel materials and device structures, enabling the down-selection of promising materials for further exploration and the TCAD-level simulation of advanced devices before wafer-based data is available. Sentaurus Materials Workbench provides a link between QuantumATK output and TCAD models implemented in Sentaurus simulators.
Process Simulation
Sentaurus Process is the industry standard for simulating the fabrication steps of semiconductor processes, ranging from silicon-based logic, memory, power, and CIS technologies to SiC-based technologies. Sentaurus Process supports the modeling of implantation, diffusion and dopant activation, thermal oxidation, mechanical stress, and epitaxial growth. Sentaurus Topography supports the modeling of topographical steps including etching, deposition, CMP, and electroplating.
Process Emulation
Sentaurus Process Explorer is a fast 3D process emulator used to identify and correct process integration issues during technology development. Sentaurus Process Explorer produces highly realistic 3D representations of process structures using GDSII mask data and a process recipe as input. Sentaurus Process Explorer is linked to the Synopsys TCAD simulators, such as Raphael FX, to enable the high accuracy RC extraction in Design Technology Co-Optimization (DTCO) applications.
Interconnect Simulation
Interconnect simulation tools address the electrical and reliability performance of middle-of-line and back-end-of-line interconnect structures. Raphael FX is the industry gold-standard 3D field solver for extracting the resistance and capacitance of detailed interconnect structures, SRAM cells, and standard cells in DTCO. Sentaurus Interconnect simulates the reliability of interconnect structures based on the mechanical stress generated through thermal processing and externally applied forces.
TCAD Environment
Sentaurus Workbench is a complete graphical environment for creating, managing, executing, and analyzing TCAD simulations. Its intuitive graphical user interface (GUI) allows users to efficiently navigate and automate the typical tasks associated with running TCAD simulations such as managing the information flow, including preprocessing of user input files, parameterizing projects, setting up and executing tool instances, optimization, and visualizing results. Sentaurus Visual is an advanced visualization tool for TCAD data. It includes extensive capabilities for plotting and interactively manipulating xy data as well as 2D and 3D TCAD structures.